论文标题
CMOS技术的硬件安全性
Hardware Security for and beyond CMOS Technology
论文作者
论文摘要
与电子系统和集成电路的大多数方面一样，硬件安全性传统上围绕主要的CMOS技术发展。但是，随着各种新兴技术的兴起，其主要目的是克服CMOS技术扩展和功耗的基本限制，也出现了独特的机会，以提高硬件安全性的概念。在本文中，我首先提供有关硬件安全性的概述。接下来，我回顾了选定的新兴技术，即（i）Spintronics，（ii）Memristors，（iii）碳纳米管及相关晶体管，（IV）纳米线和相关晶体管，以及（v）3D和2.5D集成。然后，我讨论他们的应用程序，以提高硬件安全性并概述相关的挑战。
As with most aspects of electronic systems and integrated circuits, hardware security has traditionally evolved around the dominant CMOS technology. However, with the rise of various emerging technologies, whose main purpose is to overcome the fundamental limitations for scaling and power consumption of CMOS technology, unique opportunities arise also to advance the notion of hardware security. In this paper, I first provide an overview on hardware security in general. Next, I review selected emerging technologies, namely (i) spintronics, (ii) memristors, (iii) carbon nanotubes and related transistors, (iv) nanowires and related transistors, and (v) 3D and 2.5D integration. I then discuss their application to advance hardware security and also outline related challenges.
