论文标题
超低功率FDSOI神经回路,用于极端的神经形态智能
Ultra-Low-Power FDSOI Neural Circuits for Extreme-Edge Neuromorphic Intelligence
论文作者
论文摘要
近年来,人们对人工智能电路和用于边缘计算应用程序的系统的发展越来越兴趣。内存计算的混合信号神经形态架构为边缘计算的感觉处理应用提供了有希望的超低功率解决方案,这要归功于它们实时模拟尖峰神经网络的能力。这种方法提供的细元平行性使这种神经回路可以通过将动态调整为感应信号的动态来有效地处理感官数据,而无需诉诸于von Neumann架构的时光型计算范式。为了进一步降低功耗,我们提供了一组混合信号模拟/数字电路,这些电路利用了绝缘体(FDSOI)集成过程中先进的完全消耗的硅的特征。具体而言,我们探讨了高级FDSOI技术的选项,以解决模拟设计问题并相应地优化Synapse Integrator和自适应神经元电路的设计。我们提出了电路仿真结果,并证明了电路具有紧凑设计的生物学上合理的神经动力学的能力,以实现神经形态处理器中的大规模尖峰神经网络进行了优化。
Recent years have seen an increasing interest in the development of artificial intelligence circuits and systems for edge computing applications. In-memory computing mixed-signal neuromorphic architectures provide promising ultra-low-power solutions for edge-computing sensory-processing applications, thanks to their ability to emulate spiking neural networks in real-time. The fine-grain parallelism offered by this approach allows such neural circuits to process the sensory data efficiently by adapting their dynamics to the ones of the sensed signals, without having to resort to the time-multiplexed computing paradigm of von Neumann architectures. To reduce power consumption even further, we present a set of mixed-signal analog/digital circuits that exploit the features of advanced Fully-Depleted Silicon on Insulator (FDSOI) integration processes. Specifically, we explore the options of advanced FDSOI technologies to address analog design issues and optimize the design of the synapse integrator and of the adaptive neuron circuits accordingly. We present circuit simulation results and demonstrate the circuit's ability to produce biologically plausible neural dynamics with compact designs, optimized for the realization of large-scale spiking neural networks in neuromorphic processors.