论文标题

电热传输材料的材料构型和CVD种植单层MOS2晶体管的性能降解

Electrothermal Transport Induced Material Re Configuration and Performance Degradation of CVD Grown Monolayer MoS2 Transistors

论文作者

Ansh, Kumar, Jeevesh, Sheoran, Gaurav, Shrivastava, Mayank

论文摘要

我们报告,对于CVD生长的单层MOS2,最初的结果是在电应力下材料和装置性能的时间降解。在不同的温度,门偏置和应力周期中,都探索了低场和高场机制。在低场操作过程中,在数百秒的运行后发现电流饱和,当前衰减时间常数是温度和应力周期的函数。当建立热平衡时,在低场操作中几秒钟后的电流饱和。但是,高场的运行,尤其是在低温下,会导致电离辅助物质和设备降解。发现在低温下高场的运行会导致通道的非晶化,并通过设备和开尔文探针显微镜(KPFM)分析进行了验证。通常,CVD生长的MOS2晶体管的室温延长导致闸门控制降解,较高的状态电流和阈值电压(VT)的负变化。通过微拉曼和光致发光光谱进一步验证了这一点,这表明稳态DC电应力导致通道中局部低电阻区的形成以及随后晶体管特征的丧失。我们的发现揭示了CVD MOS2在电应力下经历材料降解的独特机制,随后晶体管行为破裂。对材料和设备可靠性的这种理解有助于从设备和电路的角度确定安全的操作制度。

We report, for CVD-grown monolayer MoS2, the very first results on temporal degradation of material and device performance under electrical stress. Both low and high field regimes of operation are explored at different temperatures, gate bias and stress cycles. During low field operation, current is found to saturate after hundreds of seconds of operation with the current decay time constant being a function of temperature and stress cycle. Current saturation after several seconds during low field operation occurs when a thermal equilibrium is established. However, high field operation, especially at low temperature, leads to impact ionization assisted material and device degradation. It is found that high field operation at low temperature results in amorphization of the channel and is verified by device and Kelvin Probe Force Microscopy (KPFM) analyses. In general, a prolonged room temperature operation of CVD-grown MoS2 transistors lead to degraded gate control, higher OFF state current and negative shift in threshold voltage (VT). This is further verified, through micro-Raman and Photoluminescence spectroscopy, which suggest that a steady state DC electrical stress leads to the formation of localized low resistance regions in the channel and a subsequent loss of transistor characteristics. Our findings unveil unique mechanism by which CVD MoS2 undergoes material degradation under electrical stress and subsequent breakdown of transistor behavior. Such an understanding of material and device reliability helps in determining the safe operating regime from device as well as circuit perspective.

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