论文标题
密集量子点阵列中的栅极反射测定法
Gate reflectometry in dense quantum dot arrays
论文作者
论文摘要
硅量子设备从学术单和两数Q量的设备到工业生物的致密量子点(QD)阵列,增加了操作复杂性,并且需要更好的脉冲门口和读取技术。我们对在300毫米 - 沃特铸造厂制造的硅量量2 $ \ times $ 2 $ 2 $ 2 $ 2 $ \ times $ 2的硅量点上执行栅极电压脉冲和基于门的反射法测量值。利用阵列内的强电容耦合,仅通过高频反射仪监视一个栅极电极就足以在四个点中的每个点中建立单电子占用,并检测具有高带宽的单电子运动。全局顶门电极调节整体隧道时间,而侧面电压的线性组合产生详细的电荷稳定性图。为了测试有限磁场的自旋物理和Pauli自旋封锁,我们实施了对称栅极电压脉冲,这些脉冲直接揭示了双向交叉点电荷弛豫,这是两个点之间的失沟的函数。可以在不参与相邻的电子储层的情况下建立阵列内的电荷感测,对于将这种拆分门设备缩放到更长的2 $ \ times $ n阵列的情况下很重要。我们的技术可能会发现在大规模量子处理器的几个点自旋设备的缩放缩放中使用。
Silicon quantum devices are maturing from academic single- and two-qubit devices to industrially-fabricated dense quantum-dot (QD) arrays, increasing operational complexity and the need for better pulsed-gate and readout techniques. We perform gate-voltage pulsing and gate-based reflectometry measurements on a dense 2$\times$2 array of silicon quantum dots fabricated in a 300-mm-wafer foundry. Utilizing the strong capacitive couplings within the array, it is sufficient to monitor only one gate electrode via high-frequency reflectometry to establish single-electron occupation in each of the four dots and to detect single-electron movements with high bandwidth. A global top-gate electrode adjusts the overall tunneling times, while linear combinations of side-gate voltages yield detailed charge stability diagrams. To test for spin physics and Pauli spin blockade at finite magnetic fields, we implement symmetric gate-voltage pulses that directly reveal bidirectional interdot charge relaxation as a function of the detuning between two dots. Charge sensing within the array can be established without the involvement of adjacent electron reservoirs, important for scaling such split-gate devices towards longer 2$\times$N arrays. Our techniques may find use in the scaling of few-dot spin-qubit devices to large-scale quantum processors.