论文标题
Apenet+互连系统的建筑改进和技术增强功能
Architectural improvements and technological enhancements for the APEnet+ interconnect system
论文作者
论文摘要
APENET+板提供点对点，低延迟，3D Torus Network接口卡。在本文中，我们描述了最新一代的Apenet NIC，Apenet V5，该Apenet V5集成了基于最先进的28 nm Altera Stratix V FPGA的PCIE GEN3板。 NIC具有遵循远程DMA范式设计的网络体系结构，并量身定制，以将现代GPU的计算能力紧密地绑定到通信结构。对于APENET V5板，我们显示出通过利用新的高性能Altera收发器和PCIE GEN3 Comprians获得的带宽和BER的表征。
The APEnet+ board delivers a point-to-point, low-latency, 3D torus network interface card. In this paper we describe the latest generation of APEnet NIC, APEnet v5, integrated in a PCIe Gen3 board based on a state-of-the-art, 28 nm Altera Stratix V FPGA. The NIC features a network architecture designed following the Remote DMA paradigm and tailored to tightly bind the computing power of modern GPUs to the communication fabric. For the APEnet v5 board we show characterizing figures as achieved bandwidth and BER obtained by exploiting new high performance ALTERA transceivers and PCIe Gen3 compliancy.
