论文标题
完全数字二阶级别划分采样ADC，用于传感稀疏信号中的数据节省
Fully Digital Second-order Level-crossing Sampling ADC for Data Saving in Sensing Sparse Signals
论文作者
论文摘要
本文介绍了一个完全集成的二阶级别划分采样数据转换器，以实时数据压缩和特征提取。与采样固定电压水平采样的级别采样ADC相比，提出的电路使用线性外推更新跟踪阈值，该线性外推形成了二阶级别划分的采样ADC，该采样水平倾斜了采样水平。该计算是通过数字化完成的，可以通过修改常规SAR ADC的数字控制逻辑来实现。系统仅选择输入波形中的转折点进行量化。提出的数据转换器的输出既由选定采样点的数字值和所选采样点之间的时间戳。主要优点是数据转换器的数据节省和功率节省以及以下数字信号处理或通信电路，这是低功率传感器的理想选择。使用180nm CMOS工艺制造了测试芯片。与传统的SAR ADC相比，拟议的ADC节省了30％，并且用于跟踪ECG信号的压缩系数为6.17。
This paper presents a fully integrated second-order level-crossing sampling data converter for real-time data compression and feature extraction. Compared with level-sampling ADCs which sample at fixed voltage levels, the proposed circuits updates tracking thresholds using linear extrapolation, which forms a second-order level-crossing sampling ADC that has sloped sampling levels. The computing is done digitally and is implemented by modifying the digital control logic of a conventional SAR ADC. The system selects only the turning points in the input waveform for quantization. The output of the proposed data converter consists of both the digital value of the selected sampling points and the timestamp between the selected sampling points. The main advantages are data savings and power savings for the data converter and the following digital signal processing or communication circuits, which are ideal for low-power sensors. The test chip was fabricated using a 180nm CMOS process. The proposed ADC saves 30% compared to a conventional SAR ADC and achieves a compression factor of 6.17 for tracking ECG signals.
